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Paper Details

Quadrature Sine Wave Signals Generated by Selection Topology and its Components

P. Arivazhagan and Tarun Kanti Bhattacharyya

Journal Title:Bonfring International Journal of Power Systems and Integrated Circuits

This paper presents how to generate high frequency quadrature sinewave signals by selection topology and its active and passive components. Also, presents how to choose the value of inductor by different ways followed by performance comparison of various VCO topologies. The overall performance is displayed by all-pMOS VCO in terms of supply voltage and tuning range. The performance comparison of all-pMOS LC-VCO using various capacitive loads is discussed. All-pMOS LC-VCO with MOS capacitor switched capacitor array (SCA) followed by divider using CML latch without fixed tail current source is used for generation of high linearity quadrature signals. A three 2.4/4.8 GHz CMOS Quadrature Voltage Controlled Oscillators (QVCO?s) tuned by a diode varactor, inversion-mode pMOS varactor and an accumulation-mode nMOS varactor, respectively. The performance comparison of different varactors QVCO is simulated in terms of frequency range, tuning range, harmonic distortion and power consumption. The overall performance is displayed by inversion mode pMOS varactor QVCO. However, all the performances of varactor QVCO?s are significantly closer with all-pMOS LC VCO compared with other VCO topologies like all-nMOS LC-VCO and complementary cross coupled LC-VCO, due to low dc impedance path between the varactor to ground terminal. It displayed the power consumption of all varactor QVCO?s are equal. The QVCO?s were implemented in a 0.18 ?m standard CMOS technology as the supply voltage is 1 V. The pre and post layout simulation results are compared in terms of tuning range, phase noise, power dissipation, and harmonic distortion, self oscillation frequency of divider and reference voltage of inversion mode pMOS varctor QVCO.