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Paper Details

Design of Router Micro Architecture Based on Runtime Adaptive Selection Strategies for On-Chip Communication Interconnection Network?

Design of Router Micro Architecture Based on Runtime Adaptive Selection Strategies for On-Chip Communication Interconnection Network?

Ms. Aryadevi S, Mr. T Shanmughanathan?

Journal Title:International Journal of Computer Science and Mobile Computing - IJCSMC
Abstract


To meet the growing computation-intensive applications and the needs of low-power, highperformance systems, and the number of computing resources in single-chip has enormously increased, because current VLSI technology can support such an extensive integration of transistors. This paper presents adaptive routing selection strategies suitable for network-on-chip (NoC). The main prototype presented in this paper use west first routing algorithm to make routing decision at runtime during application execution time. Messages in the NoC are switched with a wormhole cut-through switching method, where different messages can be interleaved at flit-level in the same communication link without using virtual channels. Hence, the head-of-line blocking problem can be solved effectively and efficiently.

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