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Paper Details

Design of Chaotic and Hyperchaotic Time-Delayed Electronic Circuit

Design of Chaotic and Hyperchaotic Time-Delayed Electronic Circuit

Tanmoy Banerjee, Debabrata Biswas and B.C. Sarkar

Journal Title:Bonfring International Journal of Power Systems and Integrated Circuits

The present paper reports a first order nonlinear retarded type time-delayed chaotic and hyper chaotic electronic circuit. The proposed circuit has three distinct advantages over the existing time-delayed circuits. First, it has a nonlinearity that is expressed by closed form mathematical functions, which makes the analysis and design of the circuit easier. Second, the time-delay part of the proposed circuit is realized with an active All-Pass Filter (APF), in which no inductor is used, and the variation of delay is obtained simply by the variation of a resistor, which is more advantageous than to vary the inductor in LCL delay blocks that is widely used in all the time-delayed circuits existing in the literature. Third, the circuit shows hyperchaos even for a moderate time-delay. We describe the systematic design procedure of the circuit, and whenever necessary, the experimental results are corroborated by the numerical computations. We show that the circuit shows limit cycle oscillation, bifurcation scenario, chaotic and hyperchaotic oscillations.